1. Field of the Invention
The present invention relates generally to switched-capacitor structures.
2. Description of the Related Art
FIGS. 1A and 1B illustrate a conventional switched-capacitor structure 10 in which a sample capacitor Cs has a top plate 11 coupled to the inverting input of a differential amplifier 12 and a bottom plate 13 coupled through a first sample switch 14 to an input port 15. The differential amplifier 12 drives an output port 16 and a transfer capacitor Ct is coupled across the differential amplifier. The differential amplifier has a high gain so that its non-inverting input has substantially the same potential as its inverting input. Finally, a second sample switch 17 and a transfer switch 18 are respectively coupled to the top and bottom plates 11 and 13. The first and second sample switches 14 and 17 and the transfer switch 18 are generally realized with transistors.
FIG. 1A illustrates a sample operation of the switched-capacitor structure 10 in which the first and second sample switches 14 and 17 are closed so that an analog input signal Sin at the input port 15 urges an electrical sample charge Qs into the sample capacitor Cs to thereby generate a sample signal Ss=Qs/Cs across the sample capacitor.
FIG. 1B illustrates a transfer operation of the switched-capacitor structure 10 in which the first and second sample switches 14 and 17 are opened and the bottom plate 13 is grounded through the closed transfer switch 18. Because the signal across the sample capacitor Cs is now substantially zero, the sample charge Qs is transferred into the transfer capacitor Ct to generate an output processed signal Sprcsd=Qs/Ct at the output port 16. The sample and transfer operations of FIGS. 1A and 1B thereby generate a Sprcsd/Sin transfer function of Cs/Ct. Accordingly, this transfer function is represented in the graph 20 of FIG. 1C by a plot 22 which has a slope of Cs/Ct.
The switched-capacitor structure 20 of FIGS. 1A and 1B is thus especially suited for use as a sampler 32 in the pipelined analog-to-digital converter (ADC) 30 of FIG. 1D. The sampler 32 processes an analog input signal Sin at an input port 33 into a sampled signal Ssmpl at a system node 34. In response, an initial ADC stage 35 (e.g., a flash ADC) converts this sampled signal Ssmpl into at least one most-significant bit Do of a digital output signal that corresponds to the input signal Sin. At the same time, the sampled signal is processed into a residue signal Sres that is suitable for subsequent processing by downstream ADC stages into the less-significant bits of the output digital signal.
If the initial ADC stage is a 1.5 bit converter stage, for example, it provides decision signals 36 that are equally spaced from the midpoint of the range of the input signal Sin. In response, the residue signal Sres is preferably represented by a plot 24 in FIG. 1C that has three segments defined by the decision signals and has a slope in each segment that is twice the slope of the plot 22.
The plot 24 can be generated, for example, by supplementing the sample capacitor Cs of FIGS. 1A and 1B with an additional sample capacitor to realize the increased slope (i.e., increased gain) and by designing the transfer switch 18 so that it responds to the decision signals (36 in FIG. 1D) by applying selected offset signals to the bottom plates of the sample capacitors. When the switched-capacitor structure 20 of FIGS. 1A and 1B is modified in this fashion, it is typically referred to as a multiplying digital-to-analog converter (MDAC) which is indicated in FIG. 1D as an MDAC 38.
Although switched-capacitor structures are especially suited for accurate realization with integrated-circuit photolithographic techniques, their isolation from input circuits has generally been less than desired and their output signals have often exhibited excessive distortion and noise.
The present invention is directed to switched-capacitor structures that increase upstream and downstream isolation between structural elements and ensure that selected elements are securely and quickly turned off and on in different modes. Accordingly, they reduce distortion and noise in their processed signals.